Factoring some integers using Shor’s algorithm on real quantum hardware

Abstract Experimental realizations of Shor’s algorithm on NISQ devices often rely on heavy circuit compilation, inadvertently encodingprior knowledge of the solution and bypassing the core challenge of quantum arithmetic. In this work, we present a transparent,hardware execution baseline for the quantum order-finding routine that maintains explicit modular exponentiation, but focusingon structured composite integers that simplify modular arithmetic. We mitigate the circuit depth by targeting moduli composedof Fermat primes, where the multiplication constants ck = A2kmod N simplify to either identities or powers of two, requiringonly simple bit-shift operations.

We executed this explicit arithmetic approach on IBM superconducting hardware for N ∈{51, 85, 255, 771}. For moduli up to N = 255, we observed Hellinger fidelities up to 0.946. For N = 771, we quantitativelydemonstrate the signal degradation caused by increased circuit depth and accumulated hardware noise.

By reporting raw anddevice-compiled gate counts alongside intermediate arithmetic validation, this methodology provides an experimental proxyfor studying circuit depth and noise in structured instances of order-finding, establishing a reproducible reference point forevaluating future hardware-aware optimizations.