RLReconfigurer: Reinforcement Learning-Driven Runtime FPGA Accelerator Reconfiguration for Energy-Efficient Multi-Model DNN Edge Inference

Saher Elsayed

SSRN Electronic Journal · 2026

Edge deployment of deep neural networks (DNNs) on field-programmable gate arrays (FPGAs) demands simultaneous optimization of inference latency, energy consumption, and model accuracy, objectives that inherently conflict under fixed hardware configurations. Existing FPGA accelerators employ static design-time parameters (bitwidth, parallelism factor, clock frequency) that cannot adapt to changing workload characteristics or shifting quality-of-service constraints at runtime. This paper presents RLReconfigurer, a lightweight reinforcement learning (RL) framework that runs on the embedded ARM core of a Zynq UltraScale+ system-on-chip (SoC) to dynamically select per-layer accelerator configurations through tabular Q-learning.

The RL agent observes a compact state representation, comprising layer type, computational intensity, and remaining latency budget, and selects actions from a joint configuration space of quantization bitwidth (4/8/16-bit), compute parallelism (1×/2×/4×), and operating frequency (100–300 MHz). A composite reward signal balances energy minimization, latency compliance, and accuracy preservation. Implemented on a Xilinx ZU3EG FPGA with dynamic partial reconfiguration (DPR) and dynamic voltage-frequency scaling (DVFS), RLReconfigurer achieves 5.7 TOPS/W energy efficiency, 3.2× improvement over static 8-bit baselines, while maintaining Top-1 accuracy within 1.3% of full-precision inference across five ImageNet models.

Ablation studies confirm that each optimization knob (bitwidth, parallelism, frequency) contributes independently to energy savings, with joint optimization yielding 63% reduction over the best single-knob configuration. The Q-learning agent converges within 5,000 episodes, executes decisions in 45 µs, and requires only 175 KB of on-chip memory, two orders of magnitude less than deep RL alternatives, confirming suitability for resource-constrained embedded deployment.